搜索资源列表
mt48lc2m32b2
- SDRAM控制核，已经经过测试，完全可以稍加修改后应用-SDRAM control nuclear, has been tested, we can use a slightly modified
SDRAM_C
- SDRAM控制核，已经经过测试，完全可以稍加修改后应用-SDRAM control nuclear, has been tested, we can use a slightly modified
sdramcore
- sdram控制的内核，高手编的，已经调试过了，没有错误-SDRAM control of the kernel, the top series, has been tuned, no errors
ddr_ctrl
- verilog hdl coding DDR sdram control for fpga
H1wQqGvI
- 详细介绍了ALTERA器件的IP CORE以及如何使用SDR SDRAM CONTROL
xst3_video
- xst3_video.ZIP是基于XILINX的XST3开发板的视频采集源码，里面有SDRAM control
hssdrc_latest.tar.gz
- HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in Modelsim. HSSDRC IP core is li
SDRAM_VerilogCode.rar
- 基于FPGA的SDRAM控制器Verilog代码，开发环境为Quartus6.1，控制SDRAM实现对同一片地址先写后读。,FPGA-based SDRAM controller Verilog code, development environment for Quartus6.1, control of SDRAM to achieve the same address one after the first time to write.
sdram
- 在ISE环境中，利用verilog语言编写的SDRAM的控制，已经通过功能仿真，其中PLL部分并没有加入，使用时可以自行加入PLL模块。-Verilog language in the ISE environment, the use of SDRAM control, through functional simulation, which the PLL part and did not join, can join the PLL blocks.
SDRAM-control-SOPC
- sdram 控制器的sopc搭建 sdram 控制器的sopc搭建 -sdram controller the sopc build sdram controller sopc structures the
sdram-control
- 基于FPGA的SDRAM读写控制程序，由VHDL语言编写-FPGA-based SDRAM read and write control program, by the VHDL language
SDRAM
- 用XilinxSC1500控制SDRAM的一段VHDL代码。控制SDRAM每个时钟内输出地址所在的一个数据。-For some VHDL code with XilinxSC1500 Control SDRAM. Control SDRAM Each clock output address where a data.
ddr-sdram-control
- ddr sdram控制器的设计与验证，提供了一种极为可靠且简易的控制器设计方案。-DDR SDRAM controller design and verification, providing an extremely reliable and simple controller design.
sdram
- SDRAM控制程序！verilog语言，已调通！-The SDRAM control procedures! Verilog language, has been transferred through!
sdram
- 本程序在Quartus ii 环境中开发设计了SDRAM的控制模块，功能齐全正确，能正确对SDRAM进行读写-This procedure in Quartus ii environment development and design of SDRAM control module, complete functions correctly, the SDRAM read and write correctly
SDRAM
- C6747开发板控制SDRAM程序，测试已经通过-C6747 development board 控制SDRAM程序，测试已经通过 SDRAM control program, the test has passed
SDRAM-control
- 使用FPGA实现的SDRAM控制器访问代码，该代码的时序参数可调整-SDRAM controller FPGA implementation using the access code, the code is adjustable timing parameters
sdram
- 实现一个通过串口调试助手发送“指令和数据”来控制SDRAM 读写操作的小项目。(To achieve a serial debugging assistant to send "instructions and data" to control SDRAM read and write operation of small projects.)
A15_SDRAM_100M_HZ
- 基于Nios II的SDRAM控制设计，包括工程、程序以及仿真。(The design of SDRAM control based on Nios II, including engineering, program and simulation.)
sdram_test
- 针对黑金AX309开发板的SDRAM控制程序。基于ISE 14.7，语言为Verilog。实测可用。(For the black gold AX309 development board SDRAM control program. Based on ISE 14.7, the language is Verilog. Measured available.)